To supply triacs and other high-withstand-voltage semiconductor elements with low prices, a method is adopted in which grooves are formed by so-called mesa etching to terminate pn junctions at the semiconductor surface, and glass is packed as a surface-stabilizing material into these mesa grooves.
For example, in a mesa-type triac having mesa grooves on both sides of the element, as shown in FIG. 11, base layers 2a and 2b made of p-type diffusion layers are formed on the front and back surfaces of an n-type substrate 1, emitter layers 3a and 3b made of n-type diffusion layers are formed in the base layers 2a and 2b, respectively, a mesa groove 4 is formed in such a way that it encircles the outside of this, and glass 5 is filled in the mesa groove.
In addition, there are also semiplanar-type triacs having a mesa groove 4 on only one surface of the element, as shown in FIG. 12.
When a voltage is applied in an OFF state to such triacs, the pn junction between the substrate and the upper or lower base becomes a reverse junction depending on the polarity of the applied voltage, a depletion layer forms its vicinity and the electric current is blocked. To attain a high withstand voltage, therefore, it is necessary to prepare a high-resistance substrate in which the breakdown voltage of the pn junction is equal to or greater than a target withstand voltage. As used herein, the term "high withstand voltage" refers to a withstand voltage of 1200 V or higher.
For example, when the object is to obtain a withstand voltage of 1500 V, then, theoretically, it is sufficient to use a substrate having a resistivity of 30 .omega.cm, as is evident in FIG. 13, but in practice a substrate having a resistivity of higher than 30 .omega. must be used because in addition to the substrate resistance, there are crystal defects or impurity contaminants in the substrate, unevenness or roughness in the junction surfaces or mesa groove surfaces, curvature of the mesa groove surfaces, and other factors that lower the withstand voltage.
Thus, the substrate resistance must be made fairly high and the withstand voltage of the reverse junction between the base and the substrate must be raised in order to obtain a semiconductor element having high withstand voltage.
However, an increase in the substrate resistance is accompanied by an increase in the elongation of the depletion layer near the pn junction that occurs when a voltage is applied, as shown in FIG. 14. This is the reason that when a high withstand voltage exceeding a certain limit is applied, the depletion layer projects upward or downward and reaches yet another base layer, or projects outward in the transverse direction, passes under the mesa groove, and reaches the isolation layer (diffusion layer for element separation), and a breakdown occurs due to a punch-through, as shown in FIG. 15. For this reason, there has been a disadvantage that a high withstand voltage above the aforementioned limit cannot be attained merely by raising the substrate resistance.